ASIC Digital Architect
New York, NY · Information Technology
Salary range is $250-400,000
Comprehensive Benefit and Retirement Programs
Sign-on bonus equal to 60% of base paid in 3 installments!
Generous relocation package
This is an on-site position. Prestigious organization. Humanitarian cause in drug discovery
This client is pursuing long-term projects aimed at transforming the process of drug discovery and achieving major advances in the fields of biochemistry and molecular biology using high-performance computation. To further these goals, we have designed and built three generations of special-purpose supercomputers, as well as a variety of simulation tools that run on commodity clusters and GPUs. They are now seeking additional chip designers and VLSI engineers to join our interdisciplinary New York-based team of talented engineers and scientists. These hires will focus on continuing to develop state-of-the-art technology in support of our mission and will have the opportunity to collaborate with colleagues across our group who have a variety of technological and scientific backgrounds. Responsibilities: design and development of special-purpose hardware architectures for drug discovery and pharmaceutical applications
Who Will Be a Great Fit?
Expertise in the architecture, analysis or implementation of hardware solutions is required. Particularly relevant experience would include high-speed (multi-GHz) ASIC design, current custom chip technologies, parallel computation, microprocessor architecture, machine learning acceleration, hardware/software co-design, computer arithmetic, and high-speed interconnection networks, and digital systems simulation.
Excellent analytical and communication skills are required.
Demonstrated experience working on high-performance chips (multi-GHz) and complex hardware architectures
Relevant areas of expertise might include high-speed ASIC design, current custom chip technologies, parallel computation, microprocessor architecture, machine learning acceleration, hardware/software co-design, computer arithmetic, high-speed interconnection networks, and digital systems simulation.
Implementation experience writing RTL code (in Verilog or VHDL) is required.
We are open to considering all levels of seniority including recent college graduates as well as senior engineers as long as they are still interested in hands-on work. We are looking to add innovative contributors who share our commitment to fostering a stimulating, positive, and collaborative work environment.